Silicon on insulator device with improved heat removal and method of manufacture

ABSTRACT

A semiconductor device is fabricated in a silicon on insulator (SOI) substrate including a supporting silicon substrate, a silicon oxide layer supported by the substrate, and a silicon layer overlying the silicon oxide layer. An electrical component is fabricated in the silicon layer over a portion of the silicon oxide layer, and then the substrate opposite from the component is masked and etched. A metal layer is then formed in the portion of the substrate which has been removed by etching with the metal layer providing heat removal from the component. In an alternative embodiment, the silicon oxide layer overlying the portion of the substrate is removed with the metal layer abutting the silicon layer. In fabricating the device, preferential etching is employed to remove the silicon in the substrate with the silicon oxide functioning as an etchant stop. A two step process can be employed including a first oxide etch to etch the bulk of the silicon and then a more selective but slower etch. Then, the exposed silicon oxide can then be removed, as in the alternative embodiment, by a preferential etchant of silicon oxide.

BACKGROUND OF THE INVENTION

[0001] This invention relates generally to semiconductor devices andmanufacturing processes, and more particularly, the invention relates tosuch devices fabricated in silicon on insulator (SOI) structures.

[0002] Reduced parasitic components can be achieved in semiconductordevices by fabrication of the devices in a silicon on insulatorstructure, such as silicon on sapphire and silicon on oxide insulator,including commercially available bonded silicon on insulator andimplanted oxide (SIMOX). In such structures the supporting substrate istypically bonded to a heat sink for heat removal, which is particularlyimportant for power transistor structures. Additionally, a ground planecan be provided by metallization on the substrate surface.

[0003] The present invention is directed to an improved method offabricating silicon on insulator structures with improved heat removaland circuit ground configurations including low resistance ground paths.

BRIEF SUMMARY OF THE INVENTION

[0004] In accordance with the invention a semiconductor device isfabricated in a silicon on insulator (SOI) substrate including asupporting silicon substrate, a silicon oxide layer supported by thesubstrate, and a silicon layer over the silicon oxide layer. Moreparticularly, an electrical component such as a transistor or capacitor,for example, is fabricated in the silicon layer over a portion of thesilicon oxide layer, and then the portion of the substrate opposite fromthe component is masked and etched. A metal layer is then formed in theportion of the substrate which has been removed by etching with themetal layer providing heat removal from the component. In an alternativeembodiment, the silicon oxide layer overlying the portion of thesubstrate is removed with the metal layer abutting the silicon layer.

[0005] In fabricating the device, preferential etching can be employedto remove the silicon in the substrate with the silicon oxidefunctioning as an etchant stop. A two step etch can be applied, also,with the last etch being preferential. The exposed silicon oxide canthen be removed, as in the alternative embodiment, by preferentialetchant of silicon oxide.

[0006] A hard mask of silicon nitride, for example, can be formed on asurface of the substrate for the silicon etching. Infra red maskalignment or mirror alignment can be employed in masking and etching thesilicon nitride in forming the hard mask. The metal layer preferablycomprises a refractory metal covered by gold. Wafer abrasion can beemployed to thin the substrate prior to masking and etching.

[0007] The invention and objects and features thereof will be morereadily apparent when the following detailed description and appendedclaims when taken with drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0008] FIGS. 1A-1D are section views illustrating steps in fabricating asemiconductor device in accordance with an embodiment of the invention.

[0009] FIGS. 2A-2C are section views illustrating steps in fabricating asemiconductor device in accordance with another embodiment of theinvention.

[0010] FIGS. 2A-3C are section views illustrating known electricalcomponents which can be fabricated in a semiconductor device inaccordance with the invention.

DETAILED DESCRIPTION OF THE INVENTION

[0011] FIGS. 1A-1D are section views illustrating steps in fabricating asilicon on insulator device in accordance with one embodiment of theinvention. In FIG. 1A a SOI structure is provided which can be bondedsilicon or oxide implanted silicon in which a silicon substrate 10supports a silicon oxide layer 12 with a layer of silicon 14 providedover silicon oxide layer 12. Such SOI structures are well known andcommercially available for use in semiconductor device fabrication.

[0012] As shown in FIG. 1B an electrical component 16 is fabricated insilicon layer 14 using conventional photoresist masking, etching, anddoping techniques. Component 16 can be any semiconductor device such as:a lateral DMOS transistor as illustrated in section view in FIG. 3A, abipolar transistor as illustrated in FIG. 3B or a capacitor or varactoras illustrated in FIG. 3C. These and other semiconductor devices arewell known and the manufacturing of such devices employs conventionalsemiconductor processing techniques.

[0013] As further shown in FIG. 1B, a silicon nitride or anoxide/nitride sandwich layer 18 is formed on a surface of substrate 10opposite from component 16 which is selectively masked and etched tofunction as a hard mask in the etching of substrate 10, as shown in FIG.1C. Advantageously, a preferential etchant such as potassium hydroxideor a dry plasma etch such as CF₄+O₂ can be employed to etch the siliconin substrate 10 with silicon oxide layer 12 functioning as an etchantstop, thereby preventing overetching into silicon layer 14.

[0014] Thereafter, as illustrated in FIG. 1D, a refractory metal layer20 is deposited over the surface of substrate 10 and in the etchedportion in abutment with silicon oxide layer 12. Any of the knownrefractory metals can be employed, such as, for example, titaniumtungsten and titanium nitride. Refractory metal layer 20 is then coveredby a metal layer 22 such as gold, copper or aluminum, which can besubsequently lapped to form a planar metal surface on substrate 10.Advantageously, by removing the substrate material underlying component16, the metal heat sink of layers 20, 22 is closer to component 16 andfacilitates the removal of heat therefrom. The metal layer can alsofunction as a ground for the component. Substrate resistance is alsoreduced.

[0015] FIGS. 2A-2C are section views illustrating an alternativeembodiment of the invention. Following fabrication of the component 16as shown in FIG. 1B but before the formation of silicon nitride layer18, substrate 10 is abraded to thin the substrate and reduce the amountof subsequent etching required to expose the silicon oxide layer 12, asshown in FIG. 2A.

[0016] The structure of FIG. 2A can be further etched as shown in FIG.2B to remove not only a portion of substrate 10 but also the exposedsilicon oxide layer 12 underlying component 16 by the use of apreferential etchant of silicon oxide such as wet buffered HF acid or adry plasma etch. In this embodiment the metal layers 20, 22 abut siliconlayer 14 immediately below component 16 and thereby further facilitatesheat removal and can be readily employed as a ground for the component,while also reducing substrate resistance.

[0017] The device in accordance with the invention has reduced thermalresistance by putting the metal in close proximity to the component heatsource and also reduces substrate resistance due to the close proximityof the metal to the active transistor. Advantageously, the methodutilizes the silicon oxide layer between the two silicon layers as anetch stop which enables the etching of a thick substrate with goodconsistency without overetching into the active silicon. The thicknessof the refractory barrier metal and gold can be adjusted to provideadequate heat sink capability. If the silicon oxide layer is left inplace, the barrier metal is optional. Thus the metal heat sink can bewithin a few microns of the actual heat generation source without havingto thin down the entire wafer.

[0018] While the invention has been described with reference to specificembodiments, the description is illustrative the invention and is not tobe construed as limiting the invention. Various modifications andapplications may occur to those skilled in the art without departingfrom the true spirit and scope of the invention as defined by theappended claims.

What is claimed is:
 1. A method of fabricating a semiconductor device ina silicon on insulator (SOI) substrate comprising the steps of: a)providing a semiconductor body including a silicon supporting substrate,a silicon oxide layer supported by the substrate, and a silicon layeroverlying the silicon oxide layer; b) forming a semiconductor componentin the silicon layer over a portion of the silicon oxide layer; c)forming an etch mask on a surface of the substrate opposite from thecomponent; d) applying a preferential etchant to selectively etch thesilicon in the substrate underlying the portion of the silicon oxidelayer; and e) providing a metal layer in the etched portion of thesubstrate to provide heat removal from the component during operation ofthe component.
 2. The method as defined by claim 1 wherein the metallayer comprises a refractory metal.
 3. The method as defined by claim 2wherein the metal layer further comprises gold, copper or aluminum overthe refractory metal.
 4. The method as defined by claim 3 wherein therefractory metal comprises titanium tungsten or titanium nitride.
 5. Themethod as defined by claim 1 wherein step c) includes forming a siliconnitride layer on the surface of the substrate and then preferentiallymasking and etching the silicon nitride layer to expose the silicon inthe substrate underlying the portion of the silicon oxide layer.
 6. Themethod as defined by claim 5 wherein the silicon nitride layer ispreferentially etched with a dry plasma, and the silicon ispreferentially etched with potassium hydroxide.
 7. The method as definedby claim 6 wherein the silicon nitride is preferentially etched with aplasma and the silicon is preferentially etched with a plasma.
 8. Themethod as defined by claim 5 and further including a step after step d)of preferentially etching the exposed portion of the silicon oxidelayer.
 9. The method as defined by claim 8 wherein the silicon oxidelayer is etched with a buffered HF acid.
 10. The method as defined byclaim 8 wherein the silicon oxide layer is etched with an ion plasma.11. The method as defined by claim 1 and further including a step afterstep d) of preferentially etching the exposed portion of the siliconoxide layer.
 12. The method as defined by claim 1 and further includinga step before step c) of abrading the substrate surface opposite fromthe component to reduce the thickness of the supporting substrate. 13.The method as defined by claim 1 wherein step a) includes providing abonded silicon on insulator wafer.
 14. The method as defined by claim 1wherein step a) comprises providing a silicon wafer with implantedsilicon oxide layer therein.
 15. A semiconductor device comprising: a) asemiconductor body including a silicon supporting substrate, a siliconlayer supported by the substrate, and a silicon layer overlying thesilicon oxide layer, b) a semiconductor component formed in the siliconlayer overlying a portion of the substrate which has been removed byetching, and c) a metal layer in the portion of the substrate removed byetching, the metal layer providing heat removal from the component. 16.The semiconductor device as defined by claim 15, wherein the siliconoxide layer overlying the portion of the substrate is removed, the metallayer abutting the silicon layer.
 17. The semiconductor device asdefined by claim 16, wherein the metal layer comprises a refractorymetal.
 18. The semiconductor device as defined by claim 17, wherein themetal layer comprises gold, aluminum or copper over the refractorymetal.
 19. The semiconductor device as defined by claim 17, wherein therefractory metal is titanium tungsten or titanium nitride.
 20. Thesemiconductor device as defined by claim 15, wherein the metal layerabuts the silicon oxide layer.
 21. The semiconductor device as definedby claim 20, wherein the metal layer comprises a refractory metal. 22.The semiconductor device as defined by claim 21, wherein the metal layercomprises gold over the refractory metal.
 23. The semiconductor deviceas defined by claim 21, wherein the refractory metal comprises titaniumtungsten.